1. Field of the Invention
The invention relates to a method of communicating with intelligent input/output devices and an apparatus for automatically transferring data between the input/output devices and a host.
2. Description of the Related Art
Computer systems are being developed with more powerful and advanced features with each passing moment. Many new advanced bus structures such as the PCI, or Peripheral Component Interconnect, bus have been developed to allow greater performance of the computer system. Additionally, new serial communications buses such as Universal Serial Bus and I.E.E.E. 1394 (Institute of Electrical and Electronic Engineers) a.k.a. Firewire, have been developed as the modern personal computer is becoming a much more connected and multimedia oriented system. However, each of these places higher and higher demands upon the processor to manage and move data.
Todays operating systems are true multitasking operating systems responsible for balancing multiple tasks between given time slices. As the demand on the processor increases to service the input/output operations, it becomes more difficult to properly balance the tasks so that each task is given an adequate amount of processor time. Interrupts further complicate the matter since they are very unpredicatable and usually must be serviced quickly.
In the past, attempts have been made to solve the problem of processor loading by off loading certain operations to co-processors. A math co-processor or a direct memory access controller (DMA) are popular examples. However, the math co-processor is so tightly coupled to the processor with a proprietary interface and instructions that it is not suitable for general input/output applications. The DMA is suitable to move data once it has been configured, but requires configuration for each block of data. Thus, the DMA controller cannot function independantly beyond a single block of data (unless it is configured for demand mode). Furthermore, the DMA controller functions at a hardware level. The DMA controller has no comprehension of the type of data or type of device being serviced. Thus, the processor is always involved. In the past, the DMA controller was much more efficient at moving data from one address to another, however, todays processors are so much more efficient that their read/write cycle time approaches that of the DMA controller. So the benefits of the DMA controller have diminished over time. Moreover, any gains provided by a high performance DMA controller were typically offset by the next generation processor.
Other attempts have been made to develope intelligent input/output (I.sub.2 O) processing, but these have focused on using embedded processors, such as an Intel i960RP processor. While these solutions acheive processor independence, they do so at a very high cost. Therefore, there is a need for an inexpensive solution to intelligent input/output processing.